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Module 1: Event-Related Potentials

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Even-Related Potentials are important because they can help monitor cognitive function in brain disorders, such as Alzheimer's or Stroke. They can monitor the effects of therapeutic interventions and stringently evaluate interventions that augment cognition.

A cognitive event-related potential called the miss-match negativity, or MMN, is the first event-related potential present after birth. The MMN occurs when there is a change in auditory expectation and it is believed its function is for newborns to recognize their mother’s voice. Doctors can use this cognitive ERP to diagnose infections, disorders, or mental dysfunction.

Other Event-Related Potentials:

ABR: This is an evoked potential, is not event-related potential strictly speaking, and it checks the auditory pathway integrity.

P50 gating: This is also present at birth and it relates to attention and reduced responses to redundant stimuli.

P300: Around 4 or 6 years of age you get the P300, whereas any novelty in the visual environment evokes a response between 300 to about 450-500 milliseconds.

RP: Around 10 years of age you get the recognition potential where you start recognizing alphabets.

N400: Around 12 years of age you have the N400 evoked event-related potential. This occurs when there is some incongruity in verbal or math stimuli.

CNV: At around about 15 years you have the contingent negative variation which is used to evaluate how much risk-taking a subject would indulge in.

A silicon wafer is a material essential for manufacturing semiconductors, which are found in all kinds of electronic devices, such as the chips and sensors used in EEGs.

Silicon wafers are obtained from quartzite rock. This rock is placed in an Electric Submerged Arc Furnace. Through that we get a Metallurgical Silicon, which is further reacted to form Polysilicon Rods. From polysilicon, we form Polycrystalline Silicon Ingot, which is further melted either by using the CZ technique or by the FZ technique. This further forms a silicon ingot, which are large logs of uniform silicon known as boules and which are 99.99 percent pure silicon. This silicon ingot is then further sliced with the help of a dicing saw where diamond wires are used to slice the ingot to form individual wafers. These wafers are further lapped and polished to form a silicon wafer.

Silicon oxidation methods:

Dry oxide: Thin, about 0.05-0.5 μm. Excellent insulator for gate oxides. For very thin oxides, add nitrogen to from oxynitrides.

Wet oxide: Thick, greater than 2.5 μm. Good insulator for field oxides or masking. The quality suffers due to the diffusion of the hydrogen gas out of the film, which creates paths that electrons can follow.